/**
 * @file
 * @brief Generated functions to emit code for assembler ir nodes.
 * @note  DO NOT EDIT THIS FILE, your changes will be lost.
 *         Edit ./ir/be/ia32/ia32_spec.pl instead.
 *         created by: ./ir/be/scripts/generate_emitter.pl ./ir/be/ia32/ia32_spec.pl build/gen/ir/be/ia32
 * @date  Tue Jul  7 23:51:18 2026
 */
#include "gen_ia32_emitter.h"

#include "beemithlp.h"
#include "gen_ia32_new_nodes.h"
#include "ia32_emitter.h"

static void emit_ia32_Adc(ir_node const *const node)
{
	ia32_emitf(node, "adc%M %B");
}

static void enc_ia32_Adc(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop(node, 2);
}

static void emit_ia32_Add(ir_node const *const node)
{
	ia32_emitf(node, "add%M %B");
}

static void enc_ia32_Add(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop(node, 0);
}

static void emit_ia32_AddMem(ir_node const *const node)
{
	ia32_emitf(node, "add%M %S3, %AM");
}

static void enc_ia32_AddMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop_mem(node, 0);
}

static void emit_ia32_AddSP(ir_node const *const node)
{
	ia32_emitf(node, "addl %B");
}

static void emit_ia32_Adds(ir_node const *const node)
{
	ia32_emitf(node, "adds%FX %B");
}

static void emit_ia32_And(ir_node const *const node)
{
	ia32_emitf(node, "and%M %B");
}

static void enc_ia32_And(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop(node, 4);
}

static void emit_ia32_AndMem(ir_node const *const node)
{
	ia32_emitf(node, "and%M %S3, %AM");
}

static void enc_ia32_AndMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop_mem(node, 4);
}

static void emit_ia32_Andnp(ir_node const *const node)
{
	ia32_emitf(node, "andnp%FX %B");
}

static void emit_ia32_Andp(ir_node const *const node)
{
	ia32_emitf(node, "andp%FX %B");
}

static void emit_ia32_Breakpoint(ir_node const *const node)
{
	ia32_emitf(node, "int3");
}

static void enc_ia32_Breakpoint(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_simple(0xCC);
}

static void emit_ia32_Bsf(ir_node const *const node)
{
	ia32_emitf(node, "bsf%M %AS3, %D0");
}

static void enc_ia32_Bsf(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_0f_unop_reg(node, 0xBC, n_ia32_Bsf_operand);
}

static void emit_ia32_Bsr(ir_node const *const node)
{
	ia32_emitf(node, "bsr%M %AS3, %D0");
}

static void enc_ia32_Bsr(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_0f_unop_reg(node, 0xBD, n_ia32_Bsr_operand);
}

static void emit_ia32_Bswap(ir_node const *const node)
{
	ia32_emitf(node, "bswap%M %D0");
}

static void emit_ia32_Bswap16(ir_node const *const node)
{
	ia32_emitf(node, "xchg %<D0, %>D0");
}

static void emit_ia32_Bt(ir_node const *const node)
{
	ia32_emitf(node, "bt%M %S1, %S0");
}

static void emit_ia32_CMovcc(ir_node const *const node)
{
	ia32_emitf(node, "cmov%P5 %B");
}

static void emit_ia32_Call(ir_node const *const node)
{
	ia32_emitf(node, "call %*AS3");
}

static void emit_ia32_Cltd(ir_node const *const node)
{
	ia32_emitf(node, "cltd");
}

static void enc_ia32_Cltd(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_simple(0x99);
}

static void emit_ia32_Cmc(ir_node const *const node)
{
	ia32_emitf(node, "cmc");
}

static void enc_ia32_Cmc(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_simple(0xF5);
}

static void emit_ia32_Cmp(ir_node const *const node)
{
	ia32_emitf(node, "cmp%M %B");
}

static void enc_ia32_Cmp(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop(node, 7);
}

static void emit_ia32_CmpXChgMem(ir_node const *const node)
{
	ia32_emitf(node, "lock cmpxchg%M %S4, %AM");
}

static void emit_ia32_Const(ir_node const *const node)
{
	ia32_emitf(node, "movl %I, %D0");
}

static void emit_ia32_Conv_I2I(ir_node const *const node)
{
	ia32_emitf(node, "mov%#Ml %AS3, %#D0");
}

static void emit_ia32_CopyEbpEsp(ir_node const *const node)
{
	ia32_emitf(node, "movl %S0, %D0");
}

static void emit_ia32_CvtSI2SD(ir_node const *const node)
{
	ia32_emitf(node, "cvtsi2sd %AS3, %D0");
}

static void emit_ia32_CvtSI2SS(ir_node const *const node)
{
	ia32_emitf(node, "cvtsi2ss %AS3, %D0");
}

static void emit_ia32_Cwtl(ir_node const *const node)
{
	ia32_emitf(node, "cwtl");
}

static void enc_ia32_Cwtl(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_simple(0x98);
}

static void emit_ia32_Dec(ir_node const *const node)
{
	ia32_emitf(node, "dec%M %D0");
}

static void emit_ia32_DecMem(ir_node const *const node)
{
	ia32_emitf(node, "dec%M %AM");
}

static void enc_ia32_DecMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_unop_mem(node, 0xFE, 1);
}

static void emit_ia32_Div(ir_node const *const node)
{
	ia32_emitf(node, "div%M %AS3");
}

static void enc_ia32_Div(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_unop(node, 0xF7, 6, n_ia32_Div_divisor);
}

static void emit_ia32_Divs(ir_node const *const node)
{
	ia32_emitf(node, "divs%FX %B");
}

static void emit_ia32_Enter(ir_node const *const node)
{
	ia32_emitf(node, "enter");
}

static void emit_ia32_FldCW(ir_node const *const node)
{
	ia32_emitf(node, "fldcw %AM");
}

static void emit_ia32_FnstCW(ir_node const *const node)
{
	ia32_emitf(node, "fnstcw %AM");
}

static void emit_ia32_FtstFnstsw(ir_node const *const node)
{
	ia32_emitf(node, "ftst\nfnstsw %%ax");
}

static void emit_ia32_FucomFnstsw(ir_node const *const node)
{
	ia32_emitf(node, "fucom%FP %F0\nfnstsw %%ax");
}

static void emit_ia32_Fucomi(ir_node const *const node)
{
	ia32_emitf(node, "fucom%FPi %F0");
}

static void emit_ia32_FucomppFnstsw(ir_node const *const node)
{
	ia32_emitf(node, "fucompp\nfnstsw %%ax");
}

static void emit_ia32_IDiv(ir_node const *const node)
{
	ia32_emitf(node, "idiv%M %AS3");
}

static void enc_ia32_IDiv(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_unop(node, 0xF7, 7, n_ia32_IDiv_divisor);
}

static void emit_ia32_IJmp(ir_node const *const node)
{
	ia32_emitf(node, "jmp %*AS3");
}

static void enc_ia32_IJmp(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_unop(node, 0xFF, 4, n_ia32_IJmp_target);
}

static void emit_ia32_IMul(ir_node const *const node)
{
	ia32_emitf(node, "imul%M %B");
}

static void enc_ia32_IMul(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_0f_unop_reg(node, 0xAF, n_ia32_IMul_right);
}

static void emit_ia32_IMul1OP(ir_node const *const node)
{
	ia32_emitf(node, "imul%M %AS4");
}

static void enc_ia32_IMul1OP(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_unop(node, 0xF7, 5, n_ia32_IMul1OP_right);
}

static void emit_ia32_IMulImm(ir_node const *const node)
{
	ia32_emitf(node, "imul%M %S4, %AS3, %D0");
}

static void emit_ia32_Inc(ir_node const *const node)
{
	ia32_emitf(node, "inc%M %D0");
}

static void emit_ia32_IncMem(ir_node const *const node)
{
	ia32_emitf(node, "inc%M %AM");
}

static void enc_ia32_IncMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_unop_mem(node, 0xFE, 0);
}

static void emit_ia32_Inport(ir_node const *const node)
{
	ia32_emitf(node, "in%M %^S0, %D0");
}

static void emit_ia32_LdTls(ir_node const *const node)
{
	ia32_emitf(node, "movl %%gs:0, %D0");
}

static void emit_ia32_Lea(ir_node const *const node)
{
	ia32_emitf(node, "leal %AM, %D0");
}

static void emit_ia32_Leave(ir_node const *const node)
{
	ia32_emitf(node, "leave");
}

static void enc_ia32_Leave(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_simple(0xC9);
}

static void emit_ia32_Load(ir_node const *const node)
{
	ia32_emitf(node, "mov%#Ml %AM, %#D0");
}

static void emit_ia32_Maxs(ir_node const *const node)
{
	ia32_emitf(node, "maxs%FX %B");
}

static void emit_ia32_Mins(ir_node const *const node)
{
	ia32_emitf(node, "mins%FX %B");
}

static void emit_ia32_Movd(ir_node const *const node)
{
	ia32_emitf(node, "movd %S0, %D0");
}

static void emit_ia32_Mul(ir_node const *const node)
{
	ia32_emitf(node, "mul%M %AS4");
}

static void enc_ia32_Mul(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_unop(node, 0xF7, 4, n_ia32_Mul_right);
}

static void emit_ia32_Muls(ir_node const *const node)
{
	ia32_emitf(node, "muls%FX %B");
}

static void emit_ia32_Neg(ir_node const *const node)
{
	ia32_emitf(node, "neg%M %D0");
}

static void enc_ia32_Neg(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_unop(node, 0xF7, 3, n_ia32_Neg_val);
}

static void emit_ia32_NegMem(ir_node const *const node)
{
	ia32_emitf(node, "neg%M %AM");
}

static void enc_ia32_NegMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_unop_mem(node, 0xF6, 3);
}

static void emit_ia32_Not(ir_node const *const node)
{
	ia32_emitf(node, "not%M %D0");
}

static void enc_ia32_Not(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_unop(node, 0xF7, 2, n_ia32_Not_val);
}

static void emit_ia32_NotMem(ir_node const *const node)
{
	ia32_emitf(node, "not%M %AM");
}

static void enc_ia32_NotMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_unop_mem(node, 0xF6, 2);
}

static void emit_ia32_Or(ir_node const *const node)
{
	ia32_emitf(node, "or%M %B");
}

static void enc_ia32_Or(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop(node, 1);
}

static void emit_ia32_OrMem(ir_node const *const node)
{
	ia32_emitf(node, "or%M %S3, %AM");
}

static void enc_ia32_OrMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop_mem(node, 1);
}

static void emit_ia32_Orp(ir_node const *const node)
{
	ia32_emitf(node, "orp%FX %B");
}

static void emit_ia32_Outport(ir_node const *const node)
{
	ia32_emitf(node, "out%M %S1, %^S0");
}

static void emit_ia32_Pop(ir_node const *const node)
{
	ia32_emitf(node, "pop%M %D0");
}

static void emit_ia32_PopMem(ir_node const *const node)
{
	ia32_emitf(node, "pop%M %AM");
}

static void emit_ia32_Popcnt(ir_node const *const node)
{
	ia32_emitf(node, "popcnt%M %AS3, %D0");
}

static void emit_ia32_Prefetch(ir_node const *const node)
{
	ia32_emitf(node, "prefetch %AM");
}

static void emit_ia32_PrefetchNTA(ir_node const *const node)
{
	ia32_emitf(node, "prefetchnta %AM");
}

static void emit_ia32_PrefetchT0(ir_node const *const node)
{
	ia32_emitf(node, "prefetcht0 %AM");
}

static void emit_ia32_PrefetchT1(ir_node const *const node)
{
	ia32_emitf(node, "prefetcht1 %AM");
}

static void emit_ia32_PrefetchT2(ir_node const *const node)
{
	ia32_emitf(node, "prefetcht2 %AM");
}

static void emit_ia32_PrefetchW(ir_node const *const node)
{
	ia32_emitf(node, "prefetchw %AM");
}

static void emit_ia32_Pslld(ir_node const *const node)
{
	ia32_emitf(node, "pslld %S1, %D0");
}

static void emit_ia32_Psllq(ir_node const *const node)
{
	ia32_emitf(node, "psllq %S1, %D0");
}

static void emit_ia32_Psrld(ir_node const *const node)
{
	ia32_emitf(node, "psrld %S1, %D0");
}

static void emit_ia32_Push(ir_node const *const node)
{
	ia32_emitf(node, "push%M %AS3");
}

static void emit_ia32_PushEax(ir_node const *const node)
{
	ia32_emitf(node, "pushl %%eax");
}

static void emit_ia32_Rol(ir_node const *const node)
{
	ia32_emitf(node, "rol%M %<,S1 %D0");
}

static void enc_ia32_Rol(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_shiftop(node, 0);
}

static void emit_ia32_RolMem(ir_node const *const node)
{
	ia32_emitf(node, "rol%M %<,S3 %AM");
}

static void enc_ia32_RolMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_shiftop_mem(node, 0);
}

static void emit_ia32_Ror(ir_node const *const node)
{
	ia32_emitf(node, "ror%M %<,S1 %D0");
}

static void enc_ia32_Ror(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_shiftop(node, 1);
}

static void emit_ia32_RorMem(ir_node const *const node)
{
	ia32_emitf(node, "ror%M %<,S3 %AM");
}

static void enc_ia32_RorMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_shiftop_mem(node, 1);
}

static void emit_ia32_Sahf(ir_node const *const node)
{
	ia32_emitf(node, "sahf");
}

static void enc_ia32_Sahf(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_simple(0x9E);
}

static void emit_ia32_Sar(ir_node const *const node)
{
	ia32_emitf(node, "sar%M %<,S1 %D0");
}

static void enc_ia32_Sar(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_shiftop(node, 7);
}

static void emit_ia32_SarMem(ir_node const *const node)
{
	ia32_emitf(node, "sar%M %<,S3 %AM");
}

static void enc_ia32_SarMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_shiftop_mem(node, 7);
}

static void emit_ia32_Sbb(ir_node const *const node)
{
	ia32_emitf(node, "sbb%M %B");
}

static void enc_ia32_Sbb(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop(node, 3);
}

static void emit_ia32_Sbb0(ir_node const *const node)
{
	ia32_emitf(node, "sbb%M %D0, %D0");
}

static void emit_ia32_SetccMem(ir_node const *const node)
{
	ia32_emitf(node, "set%P3 %AM");
}

static void emit_ia32_Shl(ir_node const *const node)
{
	ia32_emitf(node, "shl%M %<,S1 %D0");
}

static void enc_ia32_Shl(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_shiftop(node, 4);
}

static void emit_ia32_ShlD(ir_node const *const node)
{
	ia32_emitf(node, "shld%M %<S2, %S1, %D0");
}

static void emit_ia32_ShlMem(ir_node const *const node)
{
	ia32_emitf(node, "shl%M %<,S3 %AM");
}

static void enc_ia32_ShlMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_shiftop_mem(node, 4);
}

static void emit_ia32_Shr(ir_node const *const node)
{
	ia32_emitf(node, "shr%M %<,S1 %D0");
}

static void enc_ia32_Shr(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_shiftop(node, 5);
}

static void emit_ia32_ShrD(ir_node const *const node)
{
	ia32_emitf(node, "shrd%M %<S2, %S1, %D0");
}

static void emit_ia32_ShrMem(ir_node const *const node)
{
	ia32_emitf(node, "shr%M %<,S3 %AM");
}

static void enc_ia32_ShrMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_shiftop_mem(node, 5);
}

static void emit_ia32_Stc(ir_node const *const node)
{
	ia32_emitf(node, "stc");
}

static void enc_ia32_Stc(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_simple(0xF9);
}

static void emit_ia32_Store(ir_node const *const node)
{
	ia32_emitf(node, "mov%M %S3, %AM");
}

static void emit_ia32_Sub(ir_node const *const node)
{
	ia32_emitf(node, "sub%M %B");
}

static void enc_ia32_Sub(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop(node, 5);
}

static void emit_ia32_SubMem(ir_node const *const node)
{
	ia32_emitf(node, "sub%M %S3, %AM");
}

static void enc_ia32_SubMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop_mem(node, 5);
}

static void emit_ia32_SubSP(ir_node const *const node)
{
	ia32_emitf(node, "subl %B\nmovl %%esp, %D1");
}

static void emit_ia32_Subs(ir_node const *const node)
{
	ia32_emitf(node, "subs%FX %B");
}

static void emit_ia32_Test(ir_node const *const node)
{
	ia32_emitf(node, "test%M %B");
}

static void emit_ia32_UD2(ir_node const *const node)
{
	ia32_emitf(node, "ud2");
}

static void emit_ia32_Ucomis(ir_node const *const node)
{
	ia32_emitf(node, "ucomis%FX %B");
}

static void emit_ia32_Xor(ir_node const *const node)
{
	ia32_emitf(node, "xor%M %B");
}

static void enc_ia32_Xor(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop(node, 6);
}

static void emit_ia32_Xor0(ir_node const *const node)
{
	ia32_emitf(node, "xor%M %D0, %D0");
}

static void emit_ia32_XorHighLow(ir_node const *const node)
{
	ia32_emitf(node, "xorb %>D0, %<D0");
}

static void emit_ia32_XorMem(ir_node const *const node)
{
	ia32_emitf(node, "xor%M %S3, %AM");
}

static void enc_ia32_XorMem(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_binop_mem(node, 6);
}

static void emit_ia32_Xorp(ir_node const *const node)
{
	ia32_emitf(node, "xorp%FX %B");
}

static void emit_ia32_emms(ir_node const *const node)
{
	ia32_emitf(node, "emms");
}

static void emit_ia32_fabs(ir_node const *const node)
{
	ia32_emitf(node, "fabs");
}

static void enc_ia32_fabs(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fsimple(0xE1);
}

static void emit_ia32_fadd(ir_node const *const node)
{
	ia32_emitf(node, "fadd%FP%FM %AF");
}

static void enc_ia32_fadd(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fbinop(node, 0, 0);
}

static void emit_ia32_fchs(ir_node const *const node)
{
	ia32_emitf(node, "fchs");
}

static void enc_ia32_fchs(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fsimple(0xE0);
}

static void emit_ia32_fdiv(ir_node const *const node)
{
	ia32_emitf(node, "fdiv%FR%FP%FM %AF");
}

static void enc_ia32_fdiv(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fbinop(node, 6, 7);
}

static void emit_ia32_fdup(ir_node const *const node)
{
	ia32_emitf(node, "fld %F0");
}

static void enc_ia32_fdup(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fop_reg(node, 0xD9, 0xC0);
}

static void emit_ia32_femms(ir_node const *const node)
{
	ia32_emitf(node, "femms");
}

static void emit_ia32_ffreep(ir_node const *const node)
{
	ia32_emitf(node, "ffreep %F0");
}

static void enc_ia32_ffreep(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fop_reg(node, 0xDF, 0xC0);
}

static void emit_ia32_fild(ir_node const *const node)
{
	ia32_emitf(node, "fild%FI %AM");
}

static void emit_ia32_fist(ir_node const *const node)
{
	ia32_emitf(node, "fist%FP%FI %AM");
}

static void emit_ia32_fistp(ir_node const *const node)
{
	ia32_emitf(node, "fistp%FI %AM");
}

static void emit_ia32_fisttp(ir_node const *const node)
{
	ia32_emitf(node, "fisttp%FI %AM");
}

static void emit_ia32_fld(ir_node const *const node)
{
	ia32_emitf(node, "fld%FM %AM");
}

static void emit_ia32_fld1(ir_node const *const node)
{
	ia32_emitf(node, "fld1");
}

static void enc_ia32_fld1(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fsimple(0xE8);
}

static void emit_ia32_fldl2e(ir_node const *const node)
{
	ia32_emitf(node, "fldl2e");
}

static void emit_ia32_fldl2t(ir_node const *const node)
{
	ia32_emitf(node, "fldl2t");
}

static void emit_ia32_fldlg2(ir_node const *const node)
{
	ia32_emitf(node, "fldlg2");
}

static void emit_ia32_fldln2(ir_node const *const node)
{
	ia32_emitf(node, "fldln2");
}

static void emit_ia32_fldpi(ir_node const *const node)
{
	ia32_emitf(node, "fldpi");
}

static void emit_ia32_fldz(ir_node const *const node)
{
	ia32_emitf(node, "fldz");
}

static void enc_ia32_fldz(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fsimple(0xEE);
}

static void emit_ia32_fmul(ir_node const *const node)
{
	ia32_emitf(node, "fmul%FP%FM %AF");
}

static void enc_ia32_fmul(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fbinop(node, 1, 1);
}

static void emit_ia32_fpop(ir_node const *const node)
{
	ia32_emitf(node, "fstp %F0");
}

static void enc_ia32_fpop(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fop_reg(node, 0xDD, 0xD8);
}

static void emit_ia32_fst(ir_node const *const node)
{
	ia32_emitf(node, "fst%FP%FM %AM");
}

static void emit_ia32_fstp(ir_node const *const node)
{
	ia32_emitf(node, "fstp%FM %AM");
}

static void emit_ia32_fsub(ir_node const *const node)
{
	ia32_emitf(node, "fsub%FR%FP%FM %AF");
}

static void enc_ia32_fsub(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fbinop(node, 4, 5);
}

static void emit_ia32_fxch(ir_node const *const node)
{
	ia32_emitf(node, "fxch %F0");
}

static void enc_ia32_fxch(ir_node const *const node)
{
	(void)node; /* avoid potential warning */
	ia32_enc_fop_reg(node, 0xD9, 0xC8);
}

static void emit_ia32_xAllOnes(ir_node const *const node)
{
	ia32_emitf(node, "pcmpeqb %D0, %D0");
}

static void emit_ia32_xLoad(ir_node const *const node)
{
	ia32_emitf(node, "movs%FX %AM, %D0");
}

static void emit_ia32_xPzero(ir_node const *const node)
{
	ia32_emitf(node, "pxor %D0, %D0");
}

static void emit_ia32_xStore(ir_node const *const node)
{
	ia32_emitf(node, "movs%FX %S3, %AM");
}

static void emit_ia32_xZero(ir_node const *const node)
{
	ia32_emitf(node, "xorp%FX %D0, %D0");
}

static void emit_ia32_xxLoad(ir_node const *const node)
{
	ia32_emitf(node, "movdqu %D0, %AM");
}

static void emit_ia32_xxStore(ir_node const *const node)
{
	ia32_emitf(node, "movdqu %S3, %AM");
}



void ia32_register_spec_emitters(void)
{
	be_set_emitter(op_ia32_Adc, emit_ia32_Adc);
	be_set_emitter(op_ia32_Add, emit_ia32_Add);
	be_set_emitter(op_ia32_AddMem, emit_ia32_AddMem);
	be_set_emitter(op_ia32_AddSP, emit_ia32_AddSP);
	be_set_emitter(op_ia32_Adds, emit_ia32_Adds);
	be_set_emitter(op_ia32_And, emit_ia32_And);
	be_set_emitter(op_ia32_AndMem, emit_ia32_AndMem);
	be_set_emitter(op_ia32_Andnp, emit_ia32_Andnp);
	be_set_emitter(op_ia32_Andp, emit_ia32_Andp);
	be_set_emitter(op_ia32_Breakpoint, emit_ia32_Breakpoint);
	be_set_emitter(op_ia32_Bsf, emit_ia32_Bsf);
	be_set_emitter(op_ia32_Bsr, emit_ia32_Bsr);
	be_set_emitter(op_ia32_Bswap, emit_ia32_Bswap);
	be_set_emitter(op_ia32_Bswap16, emit_ia32_Bswap16);
	be_set_emitter(op_ia32_Bt, emit_ia32_Bt);
	be_set_emitter(op_ia32_CMovcc, emit_ia32_CMovcc);
	be_set_emitter(op_ia32_Call, emit_ia32_Call);
	be_set_emitter(op_ia32_Cltd, emit_ia32_Cltd);
	be_set_emitter(op_ia32_Cmc, emit_ia32_Cmc);
	be_set_emitter(op_ia32_Cmp, emit_ia32_Cmp);
	be_set_emitter(op_ia32_CmpXChgMem, emit_ia32_CmpXChgMem);
	be_set_emitter(op_ia32_Const, emit_ia32_Const);
	be_set_emitter(op_ia32_Conv_I2I, emit_ia32_Conv_I2I);
	be_set_emitter(op_ia32_CopyEbpEsp, emit_ia32_CopyEbpEsp);
	be_set_emitter(op_ia32_CvtSI2SD, emit_ia32_CvtSI2SD);
	be_set_emitter(op_ia32_CvtSI2SS, emit_ia32_CvtSI2SS);
	be_set_emitter(op_ia32_Cwtl, emit_ia32_Cwtl);
	be_set_emitter(op_ia32_Dec, emit_ia32_Dec);
	be_set_emitter(op_ia32_DecMem, emit_ia32_DecMem);
	be_set_emitter(op_ia32_Div, emit_ia32_Div);
	be_set_emitter(op_ia32_Divs, emit_ia32_Divs);
	be_set_emitter(op_ia32_Enter, emit_ia32_Enter);
	be_set_emitter(op_ia32_FldCW, emit_ia32_FldCW);
	be_set_emitter(op_ia32_FnstCW, emit_ia32_FnstCW);
	be_set_emitter(op_ia32_FnstCWNOP, be_emit_nothing);
	be_set_emitter(op_ia32_FtstFnstsw, emit_ia32_FtstFnstsw);
	be_set_emitter(op_ia32_FucomFnstsw, emit_ia32_FucomFnstsw);
	be_set_emitter(op_ia32_Fucomi, emit_ia32_Fucomi);
	be_set_emitter(op_ia32_FucomppFnstsw, emit_ia32_FucomppFnstsw);
	be_set_emitter(op_ia32_IDiv, emit_ia32_IDiv);
	be_set_emitter(op_ia32_IJmp, emit_ia32_IJmp);
	be_set_emitter(op_ia32_IMul, emit_ia32_IMul);
	be_set_emitter(op_ia32_IMul1OP, emit_ia32_IMul1OP);
	be_set_emitter(op_ia32_IMulImm, emit_ia32_IMulImm);
	be_set_emitter(op_ia32_Inc, emit_ia32_Inc);
	be_set_emitter(op_ia32_IncMem, emit_ia32_IncMem);
	be_set_emitter(op_ia32_Inport, emit_ia32_Inport);
	be_set_emitter(op_ia32_LdTls, emit_ia32_LdTls);
	be_set_emitter(op_ia32_Lea, emit_ia32_Lea);
	be_set_emitter(op_ia32_Leave, emit_ia32_Leave);
	be_set_emitter(op_ia32_Load, emit_ia32_Load);
	be_set_emitter(op_ia32_Maxs, emit_ia32_Maxs);
	be_set_emitter(op_ia32_Mins, emit_ia32_Mins);
	be_set_emitter(op_ia32_Movd, emit_ia32_Movd);
	be_set_emitter(op_ia32_Mul, emit_ia32_Mul);
	be_set_emitter(op_ia32_Muls, emit_ia32_Muls);
	be_set_emitter(op_ia32_Neg, emit_ia32_Neg);
	be_set_emitter(op_ia32_NegMem, emit_ia32_NegMem);
	be_set_emitter(op_ia32_Not, emit_ia32_Not);
	be_set_emitter(op_ia32_NotMem, emit_ia32_NotMem);
	be_set_emitter(op_ia32_Or, emit_ia32_Or);
	be_set_emitter(op_ia32_OrMem, emit_ia32_OrMem);
	be_set_emitter(op_ia32_Orp, emit_ia32_Orp);
	be_set_emitter(op_ia32_Outport, emit_ia32_Outport);
	be_set_emitter(op_ia32_Pop, emit_ia32_Pop);
	be_set_emitter(op_ia32_PopMem, emit_ia32_PopMem);
	be_set_emitter(op_ia32_Popcnt, emit_ia32_Popcnt);
	be_set_emitter(op_ia32_Prefetch, emit_ia32_Prefetch);
	be_set_emitter(op_ia32_PrefetchNTA, emit_ia32_PrefetchNTA);
	be_set_emitter(op_ia32_PrefetchT0, emit_ia32_PrefetchT0);
	be_set_emitter(op_ia32_PrefetchT1, emit_ia32_PrefetchT1);
	be_set_emitter(op_ia32_PrefetchT2, emit_ia32_PrefetchT2);
	be_set_emitter(op_ia32_PrefetchW, emit_ia32_PrefetchW);
	be_set_emitter(op_ia32_Pslld, emit_ia32_Pslld);
	be_set_emitter(op_ia32_Psllq, emit_ia32_Psllq);
	be_set_emitter(op_ia32_Psrld, emit_ia32_Psrld);
	be_set_emitter(op_ia32_Push, emit_ia32_Push);
	be_set_emitter(op_ia32_PushEax, emit_ia32_PushEax);
	be_set_emitter(op_ia32_Rol, emit_ia32_Rol);
	be_set_emitter(op_ia32_RolMem, emit_ia32_RolMem);
	be_set_emitter(op_ia32_Ror, emit_ia32_Ror);
	be_set_emitter(op_ia32_RorMem, emit_ia32_RorMem);
	be_set_emitter(op_ia32_Sahf, emit_ia32_Sahf);
	be_set_emitter(op_ia32_Sar, emit_ia32_Sar);
	be_set_emitter(op_ia32_SarMem, emit_ia32_SarMem);
	be_set_emitter(op_ia32_Sbb, emit_ia32_Sbb);
	be_set_emitter(op_ia32_Sbb0, emit_ia32_Sbb0);
	be_set_emitter(op_ia32_SetccMem, emit_ia32_SetccMem);
	be_set_emitter(op_ia32_Shl, emit_ia32_Shl);
	be_set_emitter(op_ia32_ShlD, emit_ia32_ShlD);
	be_set_emitter(op_ia32_ShlMem, emit_ia32_ShlMem);
	be_set_emitter(op_ia32_Shr, emit_ia32_Shr);
	be_set_emitter(op_ia32_ShrD, emit_ia32_ShrD);
	be_set_emitter(op_ia32_ShrMem, emit_ia32_ShrMem);
	be_set_emitter(op_ia32_Stc, emit_ia32_Stc);
	be_set_emitter(op_ia32_Store, emit_ia32_Store);
	be_set_emitter(op_ia32_Sub, emit_ia32_Sub);
	be_set_emitter(op_ia32_SubMem, emit_ia32_SubMem);
	be_set_emitter(op_ia32_SubSP, emit_ia32_SubSP);
	be_set_emitter(op_ia32_Subs, emit_ia32_Subs);
	be_set_emitter(op_ia32_Test, emit_ia32_Test);
	be_set_emitter(op_ia32_UD2, emit_ia32_UD2);
	be_set_emitter(op_ia32_Ucomis, emit_ia32_Ucomis);
	be_set_emitter(op_ia32_Xor, emit_ia32_Xor);
	be_set_emitter(op_ia32_Xor0, emit_ia32_Xor0);
	be_set_emitter(op_ia32_XorHighLow, emit_ia32_XorHighLow);
	be_set_emitter(op_ia32_XorMem, emit_ia32_XorMem);
	be_set_emitter(op_ia32_Xorp, emit_ia32_Xorp);
	be_set_emitter(op_ia32_emms, emit_ia32_emms);
	be_set_emitter(op_ia32_fabs, emit_ia32_fabs);
	be_set_emitter(op_ia32_fadd, emit_ia32_fadd);
	be_set_emitter(op_ia32_fchs, emit_ia32_fchs);
	be_set_emitter(op_ia32_fdiv, emit_ia32_fdiv);
	be_set_emitter(op_ia32_fdup, emit_ia32_fdup);
	be_set_emitter(op_ia32_femms, emit_ia32_femms);
	be_set_emitter(op_ia32_ffreep, emit_ia32_ffreep);
	be_set_emitter(op_ia32_fild, emit_ia32_fild);
	be_set_emitter(op_ia32_fist, emit_ia32_fist);
	be_set_emitter(op_ia32_fistp, emit_ia32_fistp);
	be_set_emitter(op_ia32_fisttp, emit_ia32_fisttp);
	be_set_emitter(op_ia32_fld, emit_ia32_fld);
	be_set_emitter(op_ia32_fld1, emit_ia32_fld1);
	be_set_emitter(op_ia32_fldl2e, emit_ia32_fldl2e);
	be_set_emitter(op_ia32_fldl2t, emit_ia32_fldl2t);
	be_set_emitter(op_ia32_fldlg2, emit_ia32_fldlg2);
	be_set_emitter(op_ia32_fldln2, emit_ia32_fldln2);
	be_set_emitter(op_ia32_fldpi, emit_ia32_fldpi);
	be_set_emitter(op_ia32_fldz, emit_ia32_fldz);
	be_set_emitter(op_ia32_fmul, emit_ia32_fmul);
	be_set_emitter(op_ia32_fpop, emit_ia32_fpop);
	be_set_emitter(op_ia32_fst, emit_ia32_fst);
	be_set_emitter(op_ia32_fstp, emit_ia32_fstp);
	be_set_emitter(op_ia32_fsub, emit_ia32_fsub);
	be_set_emitter(op_ia32_fxch, emit_ia32_fxch);
	be_set_emitter(op_ia32_xAllOnes, emit_ia32_xAllOnes);
	be_set_emitter(op_ia32_xLoad, emit_ia32_xLoad);
	be_set_emitter(op_ia32_xPzero, emit_ia32_xPzero);
	be_set_emitter(op_ia32_xStore, emit_ia32_xStore);
	be_set_emitter(op_ia32_xZero, emit_ia32_xZero);
	be_set_emitter(op_ia32_xxLoad, emit_ia32_xxLoad);
	be_set_emitter(op_ia32_xxStore, emit_ia32_xxStore);

}

void ia32_register_spec_binary_emitters(void)
{
	be_set_emitter(op_ia32_Adc, enc_ia32_Adc);
	be_set_emitter(op_ia32_Add, enc_ia32_Add);
	be_set_emitter(op_ia32_AddMem, enc_ia32_AddMem);
	be_set_emitter(op_ia32_And, enc_ia32_And);
	be_set_emitter(op_ia32_AndMem, enc_ia32_AndMem);
	be_set_emitter(op_ia32_Breakpoint, enc_ia32_Breakpoint);
	be_set_emitter(op_ia32_Bsf, enc_ia32_Bsf);
	be_set_emitter(op_ia32_Bsr, enc_ia32_Bsr);
	be_set_emitter(op_ia32_Cltd, enc_ia32_Cltd);
	be_set_emitter(op_ia32_Cmc, enc_ia32_Cmc);
	be_set_emitter(op_ia32_Cmp, enc_ia32_Cmp);
	be_set_emitter(op_ia32_Cwtl, enc_ia32_Cwtl);
	be_set_emitter(op_ia32_DecMem, enc_ia32_DecMem);
	be_set_emitter(op_ia32_Div, enc_ia32_Div);
	be_set_emitter(op_ia32_IDiv, enc_ia32_IDiv);
	be_set_emitter(op_ia32_IJmp, enc_ia32_IJmp);
	be_set_emitter(op_ia32_IMul, enc_ia32_IMul);
	be_set_emitter(op_ia32_IMul1OP, enc_ia32_IMul1OP);
	be_set_emitter(op_ia32_IncMem, enc_ia32_IncMem);
	be_set_emitter(op_ia32_Leave, enc_ia32_Leave);
	be_set_emitter(op_ia32_Mul, enc_ia32_Mul);
	be_set_emitter(op_ia32_Neg, enc_ia32_Neg);
	be_set_emitter(op_ia32_NegMem, enc_ia32_NegMem);
	be_set_emitter(op_ia32_Not, enc_ia32_Not);
	be_set_emitter(op_ia32_NotMem, enc_ia32_NotMem);
	be_set_emitter(op_ia32_Or, enc_ia32_Or);
	be_set_emitter(op_ia32_OrMem, enc_ia32_OrMem);
	be_set_emitter(op_ia32_Rol, enc_ia32_Rol);
	be_set_emitter(op_ia32_RolMem, enc_ia32_RolMem);
	be_set_emitter(op_ia32_Ror, enc_ia32_Ror);
	be_set_emitter(op_ia32_RorMem, enc_ia32_RorMem);
	be_set_emitter(op_ia32_Sahf, enc_ia32_Sahf);
	be_set_emitter(op_ia32_Sar, enc_ia32_Sar);
	be_set_emitter(op_ia32_SarMem, enc_ia32_SarMem);
	be_set_emitter(op_ia32_Sbb, enc_ia32_Sbb);
	be_set_emitter(op_ia32_Shl, enc_ia32_Shl);
	be_set_emitter(op_ia32_ShlMem, enc_ia32_ShlMem);
	be_set_emitter(op_ia32_Shr, enc_ia32_Shr);
	be_set_emitter(op_ia32_ShrMem, enc_ia32_ShrMem);
	be_set_emitter(op_ia32_Stc, enc_ia32_Stc);
	be_set_emitter(op_ia32_Sub, enc_ia32_Sub);
	be_set_emitter(op_ia32_SubMem, enc_ia32_SubMem);
	be_set_emitter(op_ia32_Xor, enc_ia32_Xor);
	be_set_emitter(op_ia32_XorMem, enc_ia32_XorMem);
	be_set_emitter(op_ia32_fabs, enc_ia32_fabs);
	be_set_emitter(op_ia32_fadd, enc_ia32_fadd);
	be_set_emitter(op_ia32_fchs, enc_ia32_fchs);
	be_set_emitter(op_ia32_fdiv, enc_ia32_fdiv);
	be_set_emitter(op_ia32_fdup, enc_ia32_fdup);
	be_set_emitter(op_ia32_ffreep, enc_ia32_ffreep);
	be_set_emitter(op_ia32_fld1, enc_ia32_fld1);
	be_set_emitter(op_ia32_fldz, enc_ia32_fldz);
	be_set_emitter(op_ia32_fmul, enc_ia32_fmul);
	be_set_emitter(op_ia32_fpop, enc_ia32_fpop);
	be_set_emitter(op_ia32_fsub, enc_ia32_fsub);
	be_set_emitter(op_ia32_fxch, enc_ia32_fxch);

}
