/* 
 * cx25840 - register map 
 *
 * This file is auto generated do not edit. 
 *
 * There are non obvoius relationships between values.
 *
 * Submit errors in this file to the ivtv development mail list.
 *
 */
#ifndef __CX25840_SETTINGS_H
#define __CX25840_SETTINGS_H

typedef enum {
	SLEEP,
	DIGITAL_PWR_DN,
	REF_CLK_SEL,
	PWR_DN_VID_PLL,
	PWR_DN_AUX_PLL,
	AUTO_INC_DIS,
	SLV_SI_DIS,
	FORCE_CHIP_SEL_VIPCLK,
	PREFETCH_EN,
	PWR_DN_PLL_REG1,
	PWR_DN_PLL_REG2,
	DEVICE_ID,
	SOFT_RST,
	CH_SEL_ADC2,
	DUAL_MODE_ADC2,
	CHIP_ACFG_DIS,
	CH_1__SOURCE,
	CH_2__SOURCE,
	CH_3__SOURCE,
	EN_12DB_CH1,
	EN_12DB_CH2,
	EN_12DB_CH3,
	HALF_BW_CH1,
	HALF_BW_CH2,
	HALF_BW_CH3,
	VGA_SEL_CH1,
	VGA_SEL_CH2,
	VGA_SEL_CH3,
	CLAMP_SEL_CH1,
	CLAMP_SEL_CH2,
	CLAMP_SEL_CH3,
	CHROMA_IN_SEL,
	LUMA_IN_SEL,
	AUD_IN_SEL,
	CLAMP_EN_CH1,
	CLAMP_EN_CH2,
	CLAMP_EN_CH3,
	DROOP_COMP_CH1,
	DROOP_COMP_CH2,
	DROOP_COMP_CH3,
	BYPASS_CH1,
	BYPASS_CH2,
	BYPASS_CH3,
	IREF_SEL,
	VID_PLL_INT,
	VID_PLL_POST,
	AUX_PLL_INT,
	AUX_PLL_POST,
	VID_PLL_FRAC1,
	VID_PLL_FRAC2,
	VID_PLL_FRAC3,
	VID_PLL_FRAC4,
	AUX_PLL_FRAC1,
	AUX_PLL_FRAC2,
	AUX_PLL_FRAC3,
	AUX_PLL_FRAC4,
	GPIO0_OUT_EN,
	GPIO1_OUT_EN,
	CHIP_SEL_VIPCLK_OUT_EN,
	IRQN_OUT_EN,
	IR_RX_OUT_EN,
	IR_TX_OUT_EN,
	DVALID_OUT_EN,
	FIELD_OUT_EN,
	HRESET_OUT_EN,
	VRESET_OUT_EN,
	VID_OUT_EN,
	PIXCLK_OUT_EN,
	SA_SDIN_OUT_EN,
	SA_BCLKIN_OUT_EN,
	SA_WCLKIN_OUT_EN,
	SA_SDOUT_OUT_EN,
	SA_BCLKOUT_OUT_EN,
	SA_WCLKOUT_OUT_EN,
	PLL_CLK_OUT_EN,
	AC_OUT_OUT_EN,
	AC_IN_OUT_EN,
	IRQ_N_PRGM4,
	VID_IRQ_STAT,
	IR_IRQ_STAT,
	VID_OUT_SPD,
	VID_CTRL_SPD,
	AC_OUT_SPD,
	SA_OUT_SPD,
	GEN_OUT_SPD,
	GPIO0_OUT_SEL,
	GPIO1_OUT_SEL,
	CHIPSEL_OUT_SEL,
	IRQN_OUT_SEL,
	IR_RX_OUT_SEL,
	IR_TX_OUT_SEL,
	DVALID_PRGM0_OUT_SEL,
	FIELD_PRGM1_OUT_SEL,
	HRESET_PRGM2_OUT_SEL,
	VRESET_HCTL_PRGM3_OUT_SEL,
	VID_DATA_OUT_SEL,
	PIXCLK_OUT_SEL,
	AC_OUT_SEL,
	SA_OUT_OUT_SEL,
	SA_IN_OUT_SEL,
	AUX_PLL_AOUT_SEL,
	AUX_PLL_DOUT_SEL,
	AC_BITCLK_IN_SEL,
	AC_SDIN_IN_SEL,
	GPI0_IN_SEL,
	GPI1_IN_SEL,
	GPI2_IN_SEL,
	GPI3_IN_SEL,
	GPO_OUT,
	GPI_IN,
	SA_MCLK_DIV,
	SA_MCLK_SEL,
	VID_COUNT,
	EN_AV_LOCK,
	AUD_LOCK_KD_SHIFT,
	AUD_LOCK_KI_SHIFT,
	AUD_COUNT,
	AUD_LOCK_FREQ_SHIFT,
	AUD_LOCK_KD_MULT,
	AUD_LOCK_KI_MULT,
	PWR_DN_TUNING,
	PWR_DN_DLL1,
	PWR_DN_DLL2,
	PWR_DN_ADC1,
	PWR_DN_ADC2,
	PWR_DN_CH1,
	PWR_DN_CH2,
	PWR_DN_CH3,
	SLEEP_ANALOG_MSK,
	SLEEP_DLL_MSK,
	SLEEP_PLL_MSK,
	VCLK_GATE_MSK,
	CLK5x_GATE_MSK,
	SCLK_GATE_MSK,
	FOUR_X_CLK_ADC,
	VREG_D_1_0_,
	VREF_CTRL_ADC,
	BIAS_CTRL_ADC_1_0_,
	BIAS_CTRL_ADC_2_,
	BIAS_CTRL_ADC_4_3_,
	BIAS_CTRL_ADC_6_5_,
	S2DIFF_BIAS_1_0_,
	FILTER_BIAS_1_0_,
	TUNE_FIL_RST,
	CH_SEL_ADC1,
	DISCONNECT_CH1,
	TEST_MODE_CH1,
	TUNE_IN_4_0_,
	FORCE_TUNING,
	TUNE_OUT,
	TUNING_READY,
	VID_DUAL_FLAG_POL,
	AUD_DUAL_FLAG_POL,
	PLL_SPMP,
	VID_PLL_DDS,
	AUX_PLL_DDS,
	VID_PLL_RST,
	AUX_PLL_RST,
	AUX_PLL_LOCK,
	VID_PLL_LOCK,
	AUX_PLL_UNLOCK,
	VID_PLL_UNLOCK,
	DLL1_FLD,
	DLL1_UP_OVRD,
	DLL1_DOWN_OVRD,
	DLL1_CHPREF,
	DLL1_COMP_GT,
	DLL1_COMP_LT,
	DLL1_DEPTH,
	DLL1_DLYS,
	DLL1_CURRSET,
	DLL1_BYPASS,
	DLL2_Diagnostic_Control_1_REG,
	DLL2_FLD,
	DLL2_UP_OVRD,
	DLL2_DOWN_OVRD,
	DLL2_CHPREF,
	DLL2_COMP_GT,
	DLL2_COMP_LT,
	DLL2_DEPTH,
	DLL2_DLYS,
	DLL2_CURRSET,
	DLL2_BYPASS,
	WIN,
	EDG,
	DMD,
	MOD,
	RFE,
	TFE,
	RXE,
	TXE,
	RIC,
	TIC,
	CPL,
	LBM,
	R,
	TCD,
	RCD,
	CDC,
	RTO,
	ROR,
	TBY,
	RSR,
	TSR,
	ROE,
	RSE,
	TSE,
	LPF,
	RX_TX_FIFO,
	RX_TX_LVL,
	RXNDV,
	VID_FMT_SEL,
	SQ_PIXEL,
	ACFG_DIS,
	AFD_PAL_SEL,
	AFD_NTSC_SEL,
	AFD_ACQUIRE,
	INPUT_MODE,
	MAN_SC_FAST_LOCK,
	AUTO_SC_LOCK,
	CKILLEN,
	CAGCEN,
	WCEN,
	FAST_LOCK_MD,
	CLR_LOCK_STAT,
	COMB_NOTCH_MODE,
	CKILL_MODE,
	AFD_PALM_SEL,
	AFD_FORCE_PAL,
	AFD_FORCE_PALNC,
	AFD_FORCE_SECAM,
	AFD_PAL60_DIS,
	OUT_MODE,
	MODE10B,
	VBIHACTRAW_EN,
	ANC_DATA_EN,
	TASKBIT_VAL,
	BLUE_FIELD_ACT,
	BLUE_FIELD_EN,
	CLAMPRAW_EN,
	SWAPRAW,
	ACTFMT,
	VALIDFMT,
	HSFMT,
	CLK_INVERT,
	CLK_GATING,
	DCMODE,
	IDID0_SOURCE,
	VIP_OPT_AL,
	VIPBLANK_EN,
	VIPCLAMP_EN,
	POLAR,
	IDID0_9_2__LOW,
	IDID1_9_2__LOW,
	IDID0_1_0__HIGH,
	IDID1_1_0__HIGH,
	EN_A,
	EN_B,
	EN_C,
	AUD_ANC_EN,
	SAMPLE_RATE,
	AUD_GRP,
	MV_CDAT,
	MV_PSP,
	MV_CS,
	MV_T3CS,
	MV_TYPE2_PAIR,
	AFD_FMT_STAT,
	FIELD,
	SRC_FIFO_OFLOW,
	SRC_FIFO_UFLOW,
	VSYNC,
	HLOCK,
	SRC_LOCK,
	VLOCK,
	CSC_LOCK,
	AGC_LOCK,
	VPRES,
	SPECIAL_PLAY_N,
	SRC_FIFO_OFLOW_STAT,
	SRC_FIFO_UFLOW_STAT,
	CSC_LOCK_CHANGE_STAT,
	VLOCK_CHANGE_STAT,
	HLOCK_CHANGE_STAT,
	VSYNC_TRAIL_STAT,
	FMT_CHANGE_STAT,
	END_VBI_ODD_STAT,
	END_VBI_EVEN_STAT,
	MV_CHANGE_STAT,
	VPRES_CHANGE_STAT,
	CC_DAT_AVAIL_STAT,
	GS1_DAT_AVAIL_STAT,
	GS2_DAT_AVAIL_STAT,
	WSS_DAT_AVAIL_STAT,
	SRC_FIFO_OFLOW_MSK,
	SRC_FIFO_UFLOW_MSK,
	CSC_LOCK_CHANGE_MSK,
	VLOCK_CHANGE_MSK,
	HLOCK_CHANGE_MSK,
	VSYNC_TRAIL_MSK,
	FMT_CHANGE_MSK,
	END_VBI_ODD_MSK,
	END_VBI_EVEN_MSK,
	MV_CHANGE_MSK,
	VPRES_CHANGE_MSK,
	CC_DAT_AVAIL_MSK,
	GS1_DAT_AVAIL_MSK,
	GS2_DAT_AVAIL_MSK,
	WSS_DAT_AVAIL_MSK,
	BRIGHT,
	CNTRST,
	PEAK_SEL,
	PEAK_EN,
	RANGE,
	LUMA_CORE_SEL,
	HSCALE,
	HFILT,
	VSCALE,
	VFILT,
	VS_INTRLACE,
	LINE_AVG_DIS,
	USAT,
	VSAT,
	HUE,
	C_CORE_SEL,
	CHR_DELAY,
	VBI_MD_LINE1,
	VBI_MD_LINE2,
	VBI_MD_LINE3,
	VBI_MD_LINE4,
	VBI_MD_LINE5,
	VBI_MD_LINE6,
	VBI_MD_LINE7,
	VBI_MD_LINE8,
	VBI_MD_LINE9,
	VBI_MD_LINE10,
	VBI_MD_LINE11,
	VBI_MD_LINE12,
	VBI_MD_LINE13,
	VBI_MD_LINE14,
	VBI_MD_LINE15,
	VBI_MD_LINE16,
	VBI_MD_LINE17,
	FC_SEARCH_MODE,
	FC_ALT1_TYPE,
	FC_ALT2_TYPE,
	FC_ALT1,
	FC_ALT2,
	ADAPT_SLICE_DIS,
	EDGE_RESYNC_EN,
	CRI_MARG_SCALE,
	VPS_DEC_DIS,
	MOJI_PACK_DIS,
	TTX_PKTADRL_LB,
	TTX_PKTADRL_HN,
	TTX_PKTADRU_LN,
	TTX_PKTADRU_HB,
	VBI1_SDID,
	VBI2_SDID,
	VBI3_SDID,
	CC_FIFO_RST,
	GS1_FIFO_RST,
	GS2_FIFO_RST,
	WSS_FIFO_RST,
	HAMMING_TYPE,
	CC_STAT,
	CC_FIFO_DAT,
	GS1_STAT,
	GS1_FIFO_DAT,
	GS2_STAT,
	GS2_FIFO_DAT,
	WSS_STAT,
	WSS_FIFO_DAT,
	VBI1_HDELAY,
	VBI1_BITINC,
	VBI1_SLICE_DIST,
	VBI1_CRWIN,
	VBI1_FRAME_CODE,
	VBI1_FC_LENGTH,
	VBI1_CRI_TIME,
	VBI1_CRI_MARGIN,
	VBI1_CRI_LENGTH,
	VBI1_PAYLD_LENGTH,
	VBI1_FORMAT_TYPE,
	VBI1_FIFO_MODE,
	VBI1_HAM_EN,
	VBI2_HDELAY,
	VBI2_BITINC,
	VBI2_SLICE_DIST,
	VBI1_CRIWIN,
	VBI2_FRAME_CODE,
	VBI2_FC_LENGTH,
	VBI2_CRI_TIME,
	VBI2_CRI_MARGIN,
	VBI2_CRI_LENGTH,
	VBI2_PAYLD_LENGTH,
	VBI2_FORMAT_TYPE,
	VBI2_FIFO_MODE,
	VBI2_HAM_EN,
	VBI3_HDELAY,
	VBI3_BITINC,
	VBI3_SLICE_DIST,
	VBI3_CRWIN,
	VBI3_FRAME_CODE,
	VBI3_FC_LENGTH,
	VBI3_CRI_TIME,
	VBI3_CRI_MARGIN,
	VBI3_CRI_LENGTH,
	VBI3_PAYLD_LENGTH,
	VBI3_FORMAT_TYPE,
	VBI3_FIFO_MODE,
	VBI3_HAM_EN,
	HBLANK_CNT,
	HACTIVE_CNT,
	BGDEL_CNT,
	VBLANK_CNT,
	VACTIVE_CNT,
	V656BLANK_CNT,
	SRC_DECIM_RATIO,
	UV_LPF_SEL,
	LUMA_LPF_SEL,
	LCOMB_2LN_EN,
	LCOMB_3LN_EN,
	CCOMB_2LN_EN,
	CCOMB_3LN_EN,
	SC_STEP,
	VBI_OFFSET,
	FIELD_COUNT,
	TEMPDEC,
	TDFIELD,
	TDALGN,
	HR32,
	VPRES_VERT_EN,
	VT_LINE_CNT_HYST,
	DEBOUNCE_COUNT,
	VGA_GAIN,
	AGC_GAIN,
	CLAMP_LEVEL,
	VBI_GATE_EN,
	VGA_AUTO_EN,
	VGA_CRUSH_EN,
	AGC_AUTO_EN,
	CLAMP_AUTO_EN,
	VGA_SYNC,
	VGA_TRACK_RANGE,
	VGA_ACQUIRE_RANGE,
	DCC_LOOP_GAIN,
	AGC_LOOP_GAIN,
	SYNC_LOOP_GAIN,
	BP_LOOP_GAIN,
	DFT_THRESHOLD,
	BP_PERCENT,
	PLL_MAX_OFFSET,
	PLL_KI,
	PLL_KD,
	HTL_KI,
	HTL_KD,
	LCOMB_ERR_LIMIT,
	LUMA_THRESHOLD,
	CCOMB_ERR_LIMIT,
	COMB_PHASE_LIMIT,
	SYNC_TIP_INC,
	SYNC_TIP_REDUCE,
	MAJ_SEL,
	MAJ_SEL_EN,
	CRUSH_FREQ,
	WTW_EN,
	DFE_RST_MSK,
	SRC_RST_MSK,
	YCSEP_RST_MSK,
	VTG_RST_MSK,
	LUMA_RST_MSK,
	CHROMA_RST_MSK,
	SCALE_RST_MSK,
	VBI_RST_MSK,
	MVDET_RST_MSK,
	VOF_RST_MSK,
	REG_RST_MSK,
	VD_SOFT_RST,
	REV_ID,
	APL_DETECT_ENA,
	DL_ADDR_LB,
	DL_ADDR_HB,
	DL_DATA_CTL,
	DL_MAP,
	DL_AUTO_INC,
	DL_ENABLE,
	START_MICROCNTL,
	MOD_DET_STATUS0,
	MOD_DET_STATUS1,
	AUD_MODE_AUD_SYSTEM,
	AUD_STANDARD,
	PREF_MODE,
	MUTE_NO_PREF_MODE,
	DE_EMPHASIS_TIME,
	FM_DEVIATION,
	MICROCNTL_VIDEO_FORMAT,
	VIDEO_PRESENT,
	FORMAT_45MHZ,
	FORMAT_65MHZ,
	TUNER_OUTPUT_FORMAT,
	SOFT_RESET,
	AC97_INT_DIS,
	AMC_INT_DIS,
	FC_INT_DIS,
	FDL_INT_DIS,
	IFL_INT_DIS,
	NLL_INT_DIS,
	NBER_INT_DIS,
	RDS_INT_DIS,
	AC97_INT,
	AMC_INT,
	AFC_INT,
	FDL_INT,
	IFL_INT,
	NLL_INT,
	NBER_INT,
	RDS_INT,
	AAGC_HYST1,
	AAGC_HYST2,
	AAGC_TH,
	AAGC_GAIN_EN,
	AAGC_DEFAULT,
	AAGC_DEFAULT_EN,
	AFE_12DB_EN,
	IF_SRC_MODE,
	PHASE_FIX,
	PH_CH_SEL,
	PH_DBX_SEL,
	DEMATRIX_MODE,
	DMTRX_BYPASS,
	DEMATRIX_SEL_CTL,
	SA_IN_SHIFT,
	AC97_IN_SHIFT,
	PATH1_SEL_CTL,
	PATH1_AVC_RMS_CON,
	PATH1_AVC_CR,
	PATH1_AVC_STEREO,
	PATH1_AVC_AT,
	PATH1_AVC_RT,
	PATH1_AVC_CG,
	SOFT1_MUTE_EN,
	SRC1_MUTE_EN,
	SA_MUTE_EN,
	PAR_MUTE_EN,
	AC97_MUTE_EN,
	PATH1_VOLUME,
	PATH1_BAL_LEVEL,
	PATH1_BAL_LEFT,
	PATH1_AVC_THRESH,
	PATH1_EQ_BAND_SEL,
	PATH1_EQ_BASS_VOL,
	PATH1_EQ_MID_VOL,
	PATH1_EQ_TREBLE_VOL,
	PATH1_SC_RMS_CON,
	PATH1_SC_CR,
	PATH1_SC_STEREO,
	PATH1_SC_AT,
	PATH1_SC_RT,
	PATH1_SC_THRESH,
	PATH2_SEL_CTL,
	PATH2_AVC_RMS_CON,
	PATH2_AVC_CR,
	PATH2_AVC_STEREO,
	PATH2_AVC_AT,
	PATH2_AVC_RT,
	PATH2_AVC_CG,
	SOFT2_MUTE_EN,
	SRC2_MUTE_EN,
	PATH2_VOLUME,
	PATH2_BAL_LEVEL,
	PATH2_BAL_LEFT,
	PATH2_AVC_THRESH,
	PATH2_EQ_BAND_SEL,
	PATH2_EQ_BASS_VOL,
	PATH2_EQ_MID_VOL,
	PATH2_EQ_TREBLE_VOL,
	PATH2_SC_RMS_CON,
	PATH2_SC_CR,
	PATH2_SC_STEREO,
	PATH2_SC_AT,
	PATH2_SC_RT,
	PATH2_SC_THRESH,
	Sample_Rate_Converter_Status1_REG,
	Sample_Rate_Converter_Status2_REG,
	SRC1_PHASE_INC,
	SRC1_FIFO_RD_TH,
	SRC2_PHASE_INC,
	SRC2_FIFO_RD_TH,
	SRC3_PHASE_INC,
	SRC3_FIFO_RD_TH,
	SRC4_PHASE_INC,
	SRC4_FIFO_RD_TH,
	SRC5_PHASE_INC,
	SRC5_FIFO_RD_TH,
	SRC6_PHASE_INC,
	SRC6_FIFO_RD_TH,
	PARALLEL1_SRC_SEL,
	PARALLEL2_SRC_SEL,
	SERIAL_AUDIO_SRC_SEL,
	AC97_SRC_SEL,
	BASEBAND_BYPASS_CTL,
	SRC3_CLK_SEL,
	SRC3_IN_SEL,
	SRC4_CLK_SEL,
	SRC4_IN_SEL,
	SRC5_CLK_SEL,
	SRC5_IN_SEL,
	SRC6_CLK_SEL,
	SRC6_IN_SEL,
	SA_IN_BCN_DEL,
	SA_IN_WS_SEL,
	SA_IN_RIGHT_JUST,
	SA_IN_SONY_MODE,
	SA_IN_MASTER_MODE,
	SA_UP2X_BYPASS,
	SA_OUT_BCNT_DEL,
	SA_OUT_WS_SEL,
	SA_OUT_RIGHT_JUST,
	SA_OUT_SONY_MODE,
	SA_OUT_MASTER_MODE,
	AC97_SHUTDOWN,
	AC97_WAKE_UP_SYNC,
	AC97_RST_ACL,
	AC97_UP2X_BYPASS,
	ACLMSTR_BIT1,
	ACLMSTR_4TO2_3_2_,
	ACLMSTR_4TO2_4_,
	ACLMSTR_12TO8_8__,
	ACLMSTR_12TO8_9_,
	ACLMSTR_12TO8_10_,
	ACLMSTR_12TO8_11_,
	ACLMSTR_12TO8_12_,
	ACLMSTR_16TO14_14_,
	ACLMSTR_16TO14_15_,
	ACLMSTR_16TO14_16_,
	ACLCTRL00,
	ACLCTRL01_1_0_,
	ACLCTRL02_1_0_,
	ACLCTRL03_1_0_,
	ACLCTRL04_1_0_,
	ACLCTRL05_5_0_,
	ACLCTRL06_1_0_,
	ACLCTRL06_7_2_,
	ACLCTRL07_1_0_,
	ACLCTRL07_7_2_,
	ACLCTRL08_1_0_,
	ACLCTRL08_7_2_,
	ACLCMD_15_0_,
	ACLCMD_23_16_,
	ACLGPOUT_15_0_,
	ACLGPIN_15_0_,
	ACLSTAT0_15_0_,
	ACLSTAT0_23_16_,
	LOWPOWER_0_,
	LOWPOWER_7_1_,
	LOWPOWER_20_8_,
	ACL_TAG,
	ACL_LINK_UPDATE,
	RDS_I,
	number_of_settings, special_tag_setting, special_end_setting,
	special_execute_setting, special_WI2C_setting, special_delay_setting
} cx25840_setting;

#endif /* __CX25840_SETTINGS_H */
